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marvell. moving forward faster doc. no. mv-s105997-00, rev. -- may 9, 2011 document classification: proprietary information alaska ? 88E1112 technical product brief integrated 10/100/1000 gigabit ethernet transceiver
document conventions note: provides related information or information of special importance. caution: indicates potential damage to hardware or software, or loss of data. warning: indicates a risk of personal injury. document status doc status: advance technical publications: 1.00 for more information, visit our website at: www.marvell.com disclaimer no part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, including phot ocopying and recording, for any purpose, without the express written permission of marvell. marvell retains the right to make changes to this document at any time, with out notice. marvell makes no warranty of any kind, expressed or implied, with regard to any information contained in this document, including, but not limited to, the impli ed warranties of merchantability or fitness for any particular purpose. further, marvell does not warrant the accuracy or completeness of the information, text, graphics, or other items contained within this document. marvell products are not designed for use in life-support equipment or applications that would cause a life-threatening situati on if any such products failed. do not use marvell products in these types of equipment or applications. with respect to the products described herein, the user or recipient, in the absence of appropriate u.s. government authorizati on, agrees: 1) not to re-export or release any such information consisting of technology, software or source code controlled for national s ecurity reasons by the u.s. export control regulations ("ear"), to a national of ear country groups d:1 or e:2; 2) not to export the direct product of such technology or such software, to ear country groups d:1 or e:2, if such technology o r software and direct products thereof are controlled for national security reasons by the ear; and, 3) in the case of technology controlled for national security reasons under the ear where the direct product of the technology is a complete plant or component of a plant, not to export to ear country groups d:1 or e:2 the direct product of the plant or major component thereof, if such direct produ ct is controlled for national security reasons by the ear, or is subject to controls under the u.s. munitions list ("usml"). at all times hereunder, the recipient of any such information agrees that they shall be deemed to have manually signed this doc ument in connection with their receipt of any such information. copyright ? 1999?2011. marvell international ltd. all rights reserved. marvell, moving forward faster, the marvell logo, alaska , anyvoltage, dsp switcher, fastwriter, feroceon, libertas, link street, phyadvantage, prestera, topdog, virtual cable tester, yukon, and zj are registered trademarks of marvell or its affiliates. carrierspan, linkcrypt, powered by marvell green pfc, qdeo, quietvideo, sheeva, twind, and vct are trademarks of marvell or its affiliates. patent(s) pending?products identified in this document may be covered by one or more marvell patents and/or patent applications . alaska ? 88E1112 technical product brief integrated 10/100/1000 gigabit ethernet transceiver doc. no. mv-s105997-00 rev. -- copyright ? 2011 marvell page 2 document classification: proprietary information may 9, 2011, advance
integrated 10/100/1000 giga bit ethernet transceiver 88E1112 technical product brief copyright ? 2011 marvell doc. no. mv-s105997-00, rev. -- may 9, 2011, advance document classifi cation: proprietary information page 3 features ? 10/100/1000base-t ieee 802.3 compliant ? supports serial gigabit media independent interface (sgmii) ? integrated 1.25 ghz se rdes for 1000base-x fiber applications ? integrated 125 mhz serd es for 100base-fx fiber applications ? sgmii to serdes mode supported ? sgmii to sgmii bridging supported ? supports tri-speed gbic/sfp applications ? media detection? mode for copper and fiber support ? integrated virtual cable tester ? (vct?) cable diag- nostic feature ? 2-pair downshift feature ? auto-mdi/mdix feature when link partner auto-negoti- ation enabled or disabled ? advanced diagnostics: crc error checker, packet counter, pattern generator ? eeprom support for phy configuration ? selectable mdc/mdio interface or two-wire serial interface ? fully integrated digital ada ptive equalizers, echo can- cellers, and crosstalk cancellers ? advanced digital baseline wander correction ? automatic polarity correction ? ieee 802.3u compliant auto-negotiation ? requires only two supplies: 2.5v and 1.2v ? very low power dissipation p ave = 0.75w ? manufactured in a 64-pin qfn, 9x9 mm package ? available in commercial or industrial grade overview the alaska ? 88E1112 gigabit ethernet transceiver is a physical layer device for ethernet 1000base-t, 100base-tx, and 10base-t applications. it is manufactured using standard digital cmos process and contains all the active circuitry required to implement the physical layer functions to transmit and receive data on standard cat 5 unshielded twisted pair. the alaska 88E1112 device supports the serial gigabit media independent interface (sgmii) for direct connection to a mac/switch port. the 88E1112 device incorporates an additional 1.25 ghz serdes (serializer/deserializer) which may be connected directly to a fiber-optic transceiver for 1000base-x applications. the serdes is switch- able to support 125 mhz operation for 100base- fx applications. additionally, the 88E1112 device may be used to impl ement 10/100/1000base-t gigabit interface converter (gbic) or small form factor pluggable (sfp) modules. the 88E1112 device uses advanced mixed-signal processing to perform equalization, echo and crosstalk cancellation, data recovery, and error cor- rection at a gigabit per second data rate. the device achieves robust performance in noisy envi- ronments with very low power dissipation.
doc. no. mv-s105997-00, rev. -- copyright ? 2011 marvell page 4 document classification: proprieta ry information may 9, 2011, advance alaska ? 88E1112 technical product brief integrated 10/100/1000 gigabit ethernet transceiver alaska 88E1112 used in copper applications alaska 88E1112 used in media detect? applications (1000base-x serdes) alaska 88E1112 used in media detect ? applications (sgmii) alaska 88E1112 used in 1000base-t gbic/ sfp applications alaska 88E1112 used in traditional 100base-fx applications t r a n s f o r m e r rj45 media type: - 1000base-t - 100base-tx - 10base-t alaska ? 88E1112 mac interface - sgmii 10/100/1000 mbps ethernet mac alaska ? 88E1112 fiber optics 10/100/1000 mbps ethernet mac media types: - 1000base-x mac interface - sgmii m a g rj45 media type: - 1000base-t - 100base-tx - 10base-t or serdes alaska ? 88E1112 sfp interface 10/100/1000 mbps ethernet mac sgmii mac interface - sgmii m a g rj-45 media type: - 1000base-t - 100base-tx - 10base-t media type: - 1000base-x - 100base-fx - 10/100/1000 base-t t r a n s f o r m e r rj45 alaska ? 88E1112 serdes serdes 1000 mbps only ethernet mac gbic/sfp card gbic/sfp interface serdes switch board media type: - 1000base-t tbi optional eeprom alaska ? 88E1112 100base-fx fiber transceiver 10/100/1000 mbps ethernet mac mac interface - 6 pin sgmii - 4 pin sgmii media type: - 100base-fx sgmii clock 4 4 2 sgmii data 4b/5b 125 mhz 100base-fx interface
copyright ? 2011 marvell doc. no. mv-s105997-00, rev. -- may 9, 2011, advance document classifi cation: proprietary information page 5 alaska 88E1112 used in 10/100/1000base- t tri-speed gbic/sfp applications alaska 88E1112 used in 100base-fx gbic/sfp applications alaska 88E1112 used in media converter applications alaska 88E1112 used in 4-pin sgmii to 6-pin sgmii conversions t r a n s f o r m e r rj45 alaska ? 88E1112 sgmii 10/100/1000 mbps ethernet mac gbic/sfp card gbic/sfp interface sgmii switch board media type: - 1000base-t - 100base-tx - 10base-t optional eeprom alaska ? 88E1112 sgmii interface mac gbic/sfp card gbic/sfp interface sgmii switch board media type: - 100base-fx optical components t r a n s f o r m e r rj45 media type: - 1000base-t alaska ? 88E1112 serdes fiber transceiver alaska ? 88E1112 sfp interface 10/100/1000 mbps ethernet mac mac interface - 6 pin sgmii - 4 pin sgmii media type: - 1000base-x - 100base-fx - 10/100/1000 base-t sgmii clock 4 4 2 sgmii data sgmii data
doc. no. mv-s105997-00,rev. -- copyright ? 2011 marvell page 6 document classification: propriet ary information may 9, 2011, advance alaska ? 88E1112 technical product brief integrated 10/100/1000 gigabit ethernet transceiver table of contents s ection 1. s ignal d escription .............. .............. .............. .............. ........... 7 1.1 88E1112 64-pin qfn package .......................................................................................7 1.2 pin description ............................................................................................................. ..8 1.2.1 pin type definitions...................................................................................................... ...... 8 1.3 64-pin qfn pin assignment list - alphab etical by signal name ............................15 s ection 2. m echanical d rawings ................ ................ ................. ........... 16 2.1 64 - pin 9x9 mm qfn package ....................................................................................16
copyright ? 2011 marvell doc. no. mv-s105997-00, rev. -- may 9, 2011, advance document classifi cation: proprietary information page 7 signal description 88E1112 64-pin qfn package section 1. signal description the 88E1112 device is a 10/100/1000base-t/1000ba se-x/100base-fx gigabit ethernet transceiver. 1.1 88E1112 64-pin qfn package figure 1: 88E1112 64-pin qfn package (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 88E1112 top view 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 vdda mdin[2] mdip[2] hsdacn hsdacp vdda mdin[1] mdip[1] vdda mdin[0] mdip[0] rset vdda mdip[3] mdin[3] nc reset sda scl vss vddo los init/int dvdd vss dvdd mdc pol_rst pwrdn normal 17 18 19 20 21 22 23 24 25 26 30 31 32 27 28 29 64 63 62 61 60 59 58 57 56 55 51 50 49 54 53 52 s_outn s_outp s_vtt s_clkn vddal vddah s_inn s_inp f_outn vddah f_inn f_inp s_clkp f_outp f_vtt vddal config[0] dvdd config[1] config[2] dvdd config[4] config[5] status[0] dvdd xtal2 tstpt vdda config[3] status[1] vddo xtal1 sigdet mdio epad - vss
doc. no. mv-s105997-00, rev. -- copyright ? 2011 marvell page 8 document classification: proprieta ry information may 9, 2011, advance alaska ? 88E1112 technical product brief integrated 10/100/1000 gigabit ethernet transceiver 1.2 pin description 1.2.1 pin type definitions pin type definition h input with hysteresis i/o input and output i input only o output only pu internal pull-up pd internal pull-down d open drain output z tri-state output ma dc sink capability
copyright ? 2011 marvell doc. no. mv-s105997-00, rev. -- may 9, 2011, advance document classifi cation: proprietary information page 9 signal description pin description table 1: copper interface pin # pin name pin type description 18 19 mdip[0] mdin[0] i/o media dependent interface[0]. in 1000base-t mode in mdi configuration, mdip/n[0] corre- spond to bi_da. in mdix configuration, mdip/n[0] correspond to bi_db. in 100base-tx and 10ba se-t modes in mdi configuration, mdip/n[0] are used for the transmit pair. in mdix configuration, mdip/n[0] are used for the receive pair. mdip/n[0] should be tied to ground if not used. 21 22 mdip[1] mdin[1] i/o media dependent interface[1]. in 1000base-t mode in mdi configuration, mdip/n[1] corre- spond to bi_db. in mdix configuration, mdip/n[1] correspond to bi_da. in 100base-tx and 10ba se-t modes in mdi configuration, mdip/n[1] are used for the receive pair. in mdix configuration, mdip/n[1] are used for the transmit pair. mdip/n[1] should be tied to ground if not used. 27 28 mdip[2] mdin[2] i/o media dependent interface[2]. in 1000base-t mode in mdi configuration, mdip/n[2] corre- spond to bi_dc. in mdix configuration, mdip/n[2] correspond to bi_dd. in 100base-tx a nd 10base-t modes, mdip/n[2] are not used. mdip/n[2] should be tied to ground if not used. 30 31 mdip[3] mdin[3] i/o media dependent interface[3]. in 1000base-t mode in mdi configuration, mdip/n[3] corre- spond to bi_dd. in mdix configuration, mdip/n[3] correspond to bi_dc. in 100base-tx and 10 base-t modes, mdip/n[3] are not used. mdip/n[3] should be tied to ground if not used.
doc. no. mv-s105997-00, rev. -- copyright ? 2011 marvell page 10 document classification: proprieta ry information may 9, 2011, advance alaska ? 88E1112 technical product brief integrated 10/100/1000 gigabit ethernet transceiver note the fiber interface pins are not used for gbic mode. note the mac interface pins are used for gbic mode. table 2: fiber interface: 1000base-x/sgmii media interface/100base-fx pin # pin name pin type description 16 15 f_inp f_inn i 1.25 ghz input - positive and negative (1000base-x and sgmii media interface 125 mhz input - positive and negative (100base-fx) the fiber-optic transceiver?s positive output connects to the f_inp. the fiber-optic transceiver?s negative output connects to the f_inn. 60 sigdet i serdes signal detect 1 = signal detected 0 = no signal detected polarity can be changed through register 16_1.9. 11 10 f_outp f_outn o 1.25 ghz output - positive and negative (1000base-x and sgmii media interface 125 mhz output - positive and negative (100base-fx) the fiber-optic transceiver?s positive input connects to the f_outp. the fiber-optic transceiver?s negative input connects to the f_outn. output amplitude can be adjusted via register 26_1.2:0. table 3: mac interface pin # pin name pin type description 9 8 s_inp s_inn i sgmii transmit data. 1.25 gbaud input - positive and nega- tive. 5 4 s_clkp s_clkn o sgmii 625 mhz receive clock output - positive and negative. output amplitude can be adjusted via register 26_2.2:0 2 1 s_outp s_outn o sgmii receive data. 1.25 gbaud output - positive and nega- tive. output amplitude can be adjusted via register 26_2.2:0. 59 los o loss of signal/led status on hardware reset, los defaults to loss of signal where hi-z = loss of signal 0 = media interface has link the los pin can be configured to output other status.
copyright ? 2011 marvell doc. no. mv-s105997-00, rev. -- may 9, 2011, advance document classifi cation: proprietary information page 11 signal description pin description table 4: management interface/control pin # pin name pin type description 57 mdc/sscl 1 1. sscl and ssda pins should not be confus ed by the scl and sda pins. the sscl, ssda pins act like slaves in the twsi bus. the scl and sda pins act like masters in eeprom interface. i management clock pin. mdc is the management data clock reference for the serial management interface. a continuous clock stream is not expected. the maximum frequency supported is 8.3 mhz. when the 88E1112 device is connected to a two-wire serial interface (twsi) bus, mdc is connected to a serial clock line (sscl). data is stable during the high portion of the clock. 58 mdio/ssda 1 i/o management data pin. mdio is the management data. mdio transfers management data in and out of the device synchronously to mdc. this pin requires a pull-up resistor in a range from 1.5 kohm to 10 kohm when 88E1112 device is connected to a two-wire serial inter- face (twsi) bus, mdio connects to the serial data lines (ssda). these pins are open-drain and maybe be wire-ored with any number of open-drain devices. ssda requires 1.5 kohm to 10 kohm pull-up resistors. table 5: eeprom interface pin # pin name pin type description 54 scl o eeprom serial clock 53 sda i/o eeprom serial data. this pin requires a pull-up resistor in a range from 1.5 kohm to 10 kohm
doc. no. mv-s105997-00, rev. -- copyright ? 2011 marvell page 12 document classification: proprieta ry information may 9, 2011, advance alaska ? 88E1112 technical product brief integrated 10/100/1000 gigabit ethernet transceiver table 6: clock/configuration/re set/i/o voltage clamp selection pin # pin name pin type description 48 config[0] i configuration 0 pin 46 config[1] i configuration 1 pin 45 config[2] i configuration 2 pin 44 config[3] i configuration 3 pin 42 config[4] i configuration 4 pin 41 config[5] i configuration 5 pin 38 status[1] o, ma led status 1 pin 40 status[0] o, ma led status 0 pin 61 init/int o this is a triple function pin used for phy initialization, device interrupt, or led status. on hardware reset, init defaults to loss of signal where hi-z = phy initialization is in process 0 = phy registers initialized via eeprom is complete the init pin can be configured to output other status. 36 xtal1 i 25 mhz clock input 25 mhz 50 ppm tolerance crystal reference or oscillator input. 35 xtal2 o 25 mhz crystal output. 25 mhz 50 ppm tolerance crystal reference. when the xtal2 pin is not connected, it should be left floating. 52 reset i hardware reset. xtal1 must be active for a minimum of 10 clock cycles before the rising edg e of reset. reset must be in inactive state for normal operation. reset polarity is determined by pol_rst. see pol_rst below for details. 51 pol_rst i, pu reset polarity. if pol_rst = 1 or unconnected 1 = reset 0 = normal operation if pol_rst = 0 1 = normal operation 0 = reset 50 pwrdn i 1 = power down 0 = power up 49 normal i, pu test mode control 0 = test mode 1 = normal
copyright ? 2011 marvell doc. no. mv-s105997-00, rev. -- may 9, 2011, advance document classifi cation: proprietary information page 13 signal description pin description table 7: test pin # pin name pin type description 25 26 hsdacp hsdacn o ac test point. positive and negative. these pins should be left floating but brought out for probing. 34 tstpt o dc test point table 8: reference pin # pin name pin type description 17 rset i resistor reference external 5.0 kohm 1% resistor connected to ground.
doc. no. mv-s105997-00, rev. -- copyright ? 2011 marvell page 14 document classification: proprieta ry information may 9, 2011, advance alaska ? 88E1112 technical product brief integrated 10/100/1000 gigabit ethernet transceiver table 9: power & ground pin # pin name pin type description 39 43 47 62 64 dvdd power 1.2v digital supply 12 f_vtt power serdes output supply 3 s_vtt power sgmii output supply 20 23 24 29 33 vdda power 2.5v analog supply. 37 56 vddo power 1.5v or 2.5v i/o supply. if the crystal option is used, vddo must be connected to 2.5v. note: i/o pins are not 3.3v tolerant when vddo = 2.5v is used. 7 14 vddah power 2.5v analog supply. 6 13 vddal power 1.5v or 2.5v analog supply. 2.5v analog supply will draw more power. epad 55 63 vss ground ground. the 88E1112 device is contained in a 64 pin qfn pack- age, which has an exposed die pad (e-pad) at its base. the epad must be soldered to vss. the location of the epad can be found in section 2.1 "64 - pin 9x9 mm qfn package" on page 16 and table 10, ?64-pin qfn package dimensions,? on page 17 . 32 no connect nc nc
copyright ? 2011 marvell doc. no. mv-s105997-00, rev. -- may 9, 2011, advance document classifi cation: proprietary information page 15 signal description 64-pin qfn pin assignment list - alphabetical by signal name 1.3 64-pin qfn pin assignment list - alphabetical by sig- nal name pin # pin name pin # pin name 48 config[0] 50 pwrdn 46 config[1] 52 reset 45 config[2] 17 rset 44 config[3] 54 scl 42 config[4] 4 s_clkn 41 config[5] 5 s_clkp 39 dvdd 53 sda 43 dvdd 60 sigdet 47 dvdd 8 s_inn 62 dvdd 9 s_inp 64 dvdd 1 s_outn 15 f_inn 2 s_outp 16 f_inp 3 s_vtt 10 f_outn 40 status[0] 11 f_outp 38 status[1] 12 f_vtt 34 tstpt 26 hsdacn 20 vdda 25 hsdacp 23 vdda 61 init/int 24 vdda 59 los 29 vdda 57 mdc 33 vdda 19 mdin[0] 7 vddah 18 mdip[0] 14 vddah 22 mdin[1] 6 vddal 21 mdip[1] 13 vddal 28 mdin[2] 37 vddo 27 mdip[2] 56 vddo 31 mdin[3] epad vss 30 mdip[3] 55 vss 58 mdio 63 vss 32 nc 36 xtal1 49 normal 35 xtal2 51 pol_rst
doc. no. mv-s105997-00, rev. -- copyright ? 2011 marvell page 16 document classification: proprieta ry information may 9, 2011, advance alaska ? 88E1112 technical product brief integrated 10/100/1000 gigabit ethernet transceiver section 2. mechanical drawings 2.1 64 - pin 9x9 mm qfn package (all dimensions in mm.) detail : b 0.6max e e2 0.08 c a seating plane "a" d2 c ''b'' aaa e e1 1.0mm n 3 2 1 aaa c d d1 l a a2 b detail : a 0.6max b a1 a3 x 4 o
copyright ? 2011 marvell doc. no. mv-s105997-00, rev. -- may 9, 2011, advance document classifi cation: proprietary information page 17 mechanical drawings 64 - pin 9x9 mm qfn package table 10: 64-pin qfn package dimensions 12 0.60 1.00 0.10 0.25 0.50 0.05 0.30 1.00 max 0.20 ref --- --- --- 0.30 chamfer bbb aaa o l --- --- --- --- 0.40 0 0.18 e e1 e d1 b d 8.75 bsc 0.50 bsc 9.00 bsc 8.75 bsc 9.00 bsc 0.23 --- 0.00 0.80 a1 a3 a2 a symbol nom min 0.65 0.85 0.02 dimension in mm die pad siz e dimension in mm symbol d e 2 2 5.21 0.20 6.25 0.20 1. controlling dimension : millimeter note:
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